The present invention relates to a semiconductor device and a manufacturing method for the same, and can be applied to the manufacture of, for example, a semiconductor device including a trench-type MOSFET.
As an example of a field-effect transistor in which a current is made to flow between the main surface side and reverse side of a semiconductor substrate, a trench-gate type (vertical) MOSFET (metal oxide semiconductor field-effect transistor) is known which includes gate electrodes formed in ditches which are formed in an upper surface portion of a semiconductor layer formed over the main surface of the semiconductor substrate.
In Japanese Unexamined Patent Application Publication No. 2010-258252 (patent document 1), a vertical MOSFET is disclosed which includes a source region formed in an upper surface portion of a semiconductor layer formed over a semiconductor substrate, a drain region formed on the reverse side of the semiconductor substrate, and gate electrodes formed in ditches which are formed in an upper surface portion of the semiconductor layer. In the vertical MOSFET, portions of each gate electrode are extended with a narrow width toward the drain region side.
When, as described in Japanese Unexamined Patent Application Publication No. 2010-258252, a part of each gate electrode is extended toward the drain region side, the depletion layer from the extended part of each gate electrode can more easily extend when the vertical MOSFET is in an off state. This causes the depletion layers from the extended parts of adjacent gate electrodes to come in contact with each other to, thereby, block the current path. Hence, the voltage resistance of the vertical MOSFET in an off state is increased.
However, when a part of each gate electrode is extended toward the drain region side, the capacitance (feedback capacitance Crss) between the extended part of each gate electrode and the drain region on the reverse side of the semiconductor substrate increases. This decreases the switching speed of the vertical MOSFET.
Other objects and novel features of the present invention will become apparent from the description of this specification and the attached drawings.
Of the embodiments being disclosed in this application, typical ones are briefly described below.
A semiconductor device according to an embodiment of the present invention is a vertical MOSFET including gate electrodes each formed in each of ditches which are formed in an upper surface portion of a semiconductor layer formed over a main surface of a semiconductor substrate.
The gate electrodes each extend in a second direction extending along a main surface of the semiconductor substrate and each include portions which extend toward a drain region on the underside of the semiconductor substrate and which are arranged in the second direction.
According to a semiconductor device manufacturing method of an embodiment of the present invention, a vertical MOSFET is manufactured, the vertical MOSFET including gate electrodes each formed in each of ditches which are formed in an upper surface portion of a semiconductor layer formed over a main surface of a semiconductor substrate. The gate electrodes each extend in a second direction extending along a main surface of the semiconductor substrate and each include portions which extend toward a drain region on the underside of the semiconductor substrate and which are arranged in the second direction.
According to an embodiment of the present invention, the performance of a semiconductor device can be improved.